FIG. 1 illustrates a prior art auto-zeroed amplifier 100. Generally, auto-zeroed amplifiers are often used to decrease amplifier voltage offset.
In the auto-zeroed amplifier 100, a Vin 105 is coupled to a switch S2 115. The switch S2 115 is coupled to a node 119, which is in turn coupled to a non-inverting input of an amplifier auto-zeroed (“A0”) 140. A Vout 180 of the amplifier AO 140 is coupled to a switch S5 170 through a node 181. The switch S5 170 is coupled into an inverting input of the amplifier A0 140 through a node 151.
The node 181 is also coupled to resistor R1 160. The resistor R1 160 is coupled to a node 111, and the node 111 is coupled to a switch S1 110 and a resistor R2 120. The switch S1 110 is coupled to a node 117. The resistor R2 120 is coupled to a node 121, and from the node 121 to a ground 122. The node 121 is also coupled to a negative terminal of a voltage source 130, a positive terminal of which is coupled to a node 131. The node 131 is in turn coupled to a switch S3 133, and also to a switch S4 135. The switch S3 133 is coupled to the switch S1 110 through the node 117, and the switch S4 135 is coupled to the switch S2 115 at a node 119, which is in turn coupled to a non-inverting input of the amplifier A0 140. A capacitor AZ 150 is coupled between the node 117 and the node 151.
The auto-zeroed amplifier 100 can work as follows.
During a phase one (“F1”), the “auto-zero” configuration, the auto-zeroed amplifier 100 is in an “auto-offset” configuration and an offset of amplifier A0 140 is integrated over capacitor AZ 150.
During a phase two (“F2”) configuration of auto-zeroing, the “hold” configuration, the capacitor AZ 150 is electrically connected feedback through R1 160, because switch S1 110 is closed. Vin 105 is connected to the non-inverting input of the amplifier A0 140, as switch S2 115 is closed. The offset between the inverting and non-inverting inputs of the amplifier A0 140 is therefore integrated over the capacitor AZ 150. Therefore, the signal Vin is amplified with a higher accuracy as compared to non-offset compensated amplifiers.
However, there are disadvantages with the auto-zeroed amplifier 100. In the auto-zeroed amplifier 100, there is a leakage current through switch S5 170 during “F2”, there is a leakage current onto the capacitor AZ 150, thereby changing its voltage, effectively changing the offset of the amplifier 100. The voltage across S5 170, when open during “F2”, is equal to the difference between Vin 105, and Vout 180, and can be quite large, causing large leakage current through the switch S5 170. In other words, the amplifier operates as an amplifier during “F2”; however, leakage through switch S5 170 caused by this quite large voltage is a limiting operation time between instances of auto-zeroing periods “F1”.
FIG. 2 illustrates a prior art sample/long hold system. A Vin 205 is coupled to a switch S0 210. The switch S0 210 is coupled to a node 212. A switch S1 215 is also coupled to the node 212. A switch S2 220 is also coupled to the node 212, as is its body diode. The switch S1 215 is coupled to a node 217, and the node 217 is coupled to an inverting input of an amplifier A0 230. The node 217 is also coupled to a Vout 235 of the amplifier A0 230. The switch S2 220 is coupled to a node 222. The node 222 is coupled to a capacitor C0 225 and a non-inverting input of the amplifier A0 230. The capacitor C0 225 is also coupled to a ground 227.
The sample/long hold 200 can work as follows.
During a phase “F0”, the “sample” configuration, the switch 210, and 220 are closed, which conveys the voltage Vin 205 to both the capacitor C0 225 and the non-inverting input of the amplifier A0 230. The amplifier A0 230 is a unity gain amplifier, as output 235 is shorted to the inverting input 217.
During a “hold” phase “F0 not”, the switch 215 is shut, and the switches S0 210 and S2 220 are open. Voltage drop across switch 220 is equal to the voltage offset of the amplifier A0 (a few milliVolts), hence the ensuring small leakage through this switch and long hold time. However, this is a sample/hold circuit and not directly usable in auto-zeroed amplifier of FIG. 1. This sample and hold circuit avoids the transistor leakage problem of FIG. 1, as it is not an auto-correct circuit, however, therefore, it does not autocorrect.
Therefore, there is a need in the art as understood by the present inventors to combine the auto-zero compensation of FIG. 1 with the sample and hold of FIG. 2 that addresses at least some of the concerns of the usage of the prior art.